CAMBRIDGE, United Kingdom, April 02, 2025 (GLOBE NEWSWIRE) -- lowRISC C.I.C., the open silicon ecosystem organisation, together with SCI Semiconductor, a leader in CHERI solutions and both CHERI Alliance founding members, today announced the release of the open source Sunburst Chip design repository, a key milestone in phase two of the DSbD/UKRI-funded Sunburst Project (Grant Number: 107540). This marks a significant step in bringing CHERIoT-Ibex based secure microcontrollers to market, as leveraged by SCI’s ICENI device family, which will reach first commercial availability this year.
Why it matters: memory safety vulnerabilities account for around 70% of reported exploits, causing industries from automotive to IoT and industrial systems to require secure, efficient microcontroller solutions that balance performance, power consumption, and affordability. CHERI technology provides a critical solution, mitigating these vulnerabilities by enforcing memory safety at the hardware level.
“By addressing security challenges in a ‘by design’ manner, CHERIoT-Ibex has proven its potential as a next-generation secure microcontroller architecture. However, to move the needle, CHERIoT-based IP must be both commercial-grade and readily available,” said Dr. Gavin Ferris, CEO of lowRISC. “Our release, with SCI, of the permissively licensed open source Sunburst Chip repository is a significant turning point in bringing CHERI-based security to the embedded systems market, and represents a core deliverable of the Sunburst project.”
This news follows lowRISC and SCI Semiconductor’s commitment to tape out the Sonata™ design (incorporating Microsoft's Ibex®-based CHERIoT core). This builds on the success of the first phase of the Sunburst Project, which introduced CHERI technology to embedded engineers through the Sonata™ FPGA board and RTL platform. The project was subsequently extended to deliver an open source SoC top-level, reusing much of the IP developed for OpenTitan “Earl Grey”, which itself has reached production with Google and is heading into Chromebooks this year. Sonata™ platforms distributed to key stakeholders by the Sunburst project are driving awareness, technical engagement and innovation around memory-safe microcontrollers as could be seen in the recent Digital Catapult / DSbD TAP Cohort 6 event.
SCI Semiconductor is leveraging the Sunburst Chip repository as the foundation of their ICENI family of secure microcontrollers. As part of this effort, SCI is targeting a 22nm commercial process and will drive this design to form the basis for the first ICENI secure microcontroller, a commercial chip available in the second half of 2025.
“The availability of commercial-grade CHERI technology is a key factor in shaping the future of secure computing,” said Haydn Povey, Chief Executive, SCI Semiconductor. “We are on a mission to ensure that the market has access to robust, open source foundations for secure-by-design microcontrollers enabling a focus on differentiation, just as we have with Iceni.”
The Sunburst Chip repository is now publicly available on GitHub at https://github.com/lowRISC/sunburst-chip. Developers and researchers are encouraged to explore the repository and leverage the technology for their own CHERIoT-Ibex based designs. For those looking to experiment with CHERIoT-Ibex today, the Sonata™ low-cost boards are available to purchase via Mouser.
About lowRISC®
Founded in 2014 at the University of Cambridge Department of Computer Science and Technology, lowRISC is a not-for-profit company/CIC that provides a neutral home for collaborative engineering to develop and maintain open source silicon designs and tools for the long term. The lowRISC not-for-profit structure combined with full-stack engineering capabilities in-house enables the hosting and management of high-quality projects like OpenTitan and Sunburst via the Silicon Commons® approach.
About SCI Semiconductor
SCI Semiconductor was formed to lead the commercialisation of CHERI enabled devices. With a strong focus on secure and high-integrity computing, the organisation has built a team of recognised industry leaders, with decades of leadership in security, processor IP and chip design, and high-integrity software.
About the CHERI Alliance
lowRISC and SCI Semiconductor are both founding members of the CHERI Alliance, a community interest organisation promoting the global adoption of the Capability Hardware Enhanced RISC Instructions (CHERI) security technology across the computing industry. Building on over a decade of pioneering research by the University of Cambridge and SRI International, CHERI introduces a proven architecture designed to enhance system security through fine-grained memory protection and software compartmentalization. The Alliance is actively engaging with industry, academia, and the public sector to standardise and implement CHERI across a diverse range of computing platforms. To learn more, visit http://www.cheri-alliance.org
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